PIC18F2423/2523/4423/4523
TABLE 1-3: PIC18F4423/4523 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP Type Type
Description
PORTE is a bidirectional I/O port.
RE0/RD/AN5
RE0
RD
AN5
8 25 25
I/O ST
Digital I/O.
I TTL Read control for Parallel Slave Port
(see also WR and CS pins).
I Analog Analog Input 5.
RE1/WR/AN6
RE1
WR
AN6
9 26 26
I/O ST
Digital I/O.
I TTL Write control for Parallel Slave Port
(see CS and RD pins).
I Analog Analog Input 6.
RE2/CS/AN7
RE2
CS
AN7
10 27 27
I/O ST
Digital I/O.
I TTL Chip select control for Parallel Slave Port
(see related RD and WR).
I Analog Analog Input 7.
RE3
— — — — — See MCLR/VPP/RE3 pin.
VSS
12, 31 6, 30, 6, 29 P
— Ground reference for logic and I/O pins.
31
VDD
11, 32 7, 8, 7, 28 P
— Positive supply for logic and I/O pins.
28, 29
NC
— 13 12,13, — — No connect.
33, 34
Legend:
Note 1:
2:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
I2C = I2C™/SMBus
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
© 2009 Microchip Technology Inc.
DS39755C-page 23