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PIC18F2523-ISO View Datasheet(PDF) - Microchip Technology

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PIC18F2523-ISO Datasheet PDF : 54 Pages
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PIC18F2423/2523/4423/4523
REGISTER 2-3: ADCON2: A/D CONTROL REGISTER 2
R/W-0
ADFM
bit 7
U-0
R/W-0
R/W-0
R/W-0
ACQT2
ACQT1
ACQT0
R/W-0
ADCS2
R/W-0
ADCS1
R/W-0
ADCS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-3
bit 2-0
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
Unimplemented: Read as ‘0
ACQT<2:0>: A/D Acquisition Time Select bits
111 = 20 TAD
110 = 16 TAD
101 = 12 TAD
100 = 8 TAD
011 = 6 TAD
010 = 4 TAD
001 = 2 TAD
000 = 0 TAD(1)
ADCS<2:0>: A/D Conversion Clock Select bits
111 = FRC (clock derived from A/D RC oscillator)(1)
110 = FOSC/64
101 = FOSC/16
100 = FOSC/4
011 = FRC (clock derived from A/D RC oscillator)(1)
010 = FOSC/32
001 = FOSC/8
000 = FOSC/2
Note 1: If the A/D FRC clock source is selected, a delay of one TCY (instruction cycle) is added before the A/D
clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
© 2009 Microchip Technology Inc.
DS39755C-page 27

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