XMEGA D3
7.4 Data Memory
The Data Memory consist of the I/O Memory, EEPROM and SRAM memories, all within one lin-
ear address space, see Figure 7-2 on page 11. To simplify development, the memory map for all
devices in the family is identical and with empty, reserved memory space for smaller devices.
Figure 7-2. Data Memory Map (Hexadecimal address)
Byte Address ATxmega192D3
Byte Address
0
I/O Registers
0
FFF
(4KB)
FFF
1000
17FF
EEPROM
(2K)
1000
17FF
RESERVED
2000
5FFF
Internal SRAM
(16K)
2000
3FFF
ATxmega128D3
I/O Registers
(4KB)
EEPROM
(2K)
RESERVED
Internal SRAM
(8K)
Byte Address
0
FFF
1000
17FF
2000
2FFF
ATxmega64D3
I/O Registers
(4KB)
EEPROM
(2K)
RESERVED
Internal SRAM
(4K)
Byte Address
0
FFF
1000
1FFF
2000
5FFF
ATxmega256D3
I/O Registers
(4KB)
EEPROM
(4K)
Internal SRAM
(16K)
11
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