GL811USB View Datasheet(PDF) - Genesys Logic

Part Name

Description

Manufacturer

GL811USB

USB 2.0 to ATA / ATAPI Bridge Controller

Genesys Logic 

GL811USB – USB 2.0 to ATA / ATAPI Bridge Controller

6.4.2.1 Initiating a Multiword DMA data burst

CS0_/ CS1_

(Note)

tM

DMARQ (Note)

DMACK_

DIOR_/DIOW_

Read DD(15:0)

Write DD(15:0)

tI

tD

tE

tG

tF

tG

tH

Note:

The host shall not assert DMACK_ or negate both CS0_ and CS1_ until the assertion of

DMARQ is detected. The maximum time from the assertion of DMARQ to the assertion of

DMACK_ or the negation of both CS0_ and CS1_ is not defined.

©2000-2002 Genesys Logic Inc.—All rights reserved.

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