FDC37B78X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37B78X

Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

SMSC -> Microchip 

GENERAL PURPOSE I/O PINS

PIN NO.

QFP

77

78

79

TABLE 2 - GENERAL PURPOSE I/O PIN FUNCTIONS

DEFAULT

ALT

ALT

ALT

BUFFER

FUNCT FUNCT 1 FUNCT 2 FUNCT 3

TYPE

GPIO

GPIO

GPIO

nSMI

nRING

WDT

-

EETI1

P17

-

-

EETI1

IO12

IO4

IO4

INDEX

REGISTER

GP1

GP1

GP1

GPIO

GP10

GP11

GP12

80

GPIO

LED

-

-

IO24

GP1

GP13

81

GPIO

IRRX2 -

-

82

GPIO

IRTX2

-

-

IO4

IO24

GP1

GP1

GP14

GP15

4

nMTR1

GPIO

-

-

IO24

GP1

GP16

6

nDS1

GPIO

-

-

39

PCI_CLK IRQ14 GPIO

-

IO24

IO12

GP1

GP5

GP17

GP50

2

91

92

83

84

85

86

87

88

89

90

Note 1

DRVDEN1

nROMCS2

nROMOE2

RD02,3

RD12,3

GPIO

IRQ11

IRQ12

IRQ1

IRQ3

IRQ8

GPIO

GPIO

GPIO

GPIO

RD22,3

RD32,3

RD42,3

RD52,3

RD62,3

IRQ4

IRQ5

IRQ6

IRQ7

IRQ8

GPIO

GPIO

GPIO

GPIO

GPIO

RD72,3

IRQ10 GPIO

Either Edge Triggered Interrupt Inputs.

nSMI

EETI1

EETI1

nSMI

LED

nRING

WDT

P17

-

-

-

IO24

IO12

IO12

IO12

IO24

IO12

IO12

IO12

IO12

IO12

IO12

GP5

GP5

GP5

GP6

GP6

GP6

GP6

GP6

GP6

GP6

GP6

GP52

GP53

GP54

GP60

GP61

GP62

GP63

GP64

GP65

GP66

GP67

Note 2 At power-up, RD0-7, nROMCS and nROMOE function as the XD Bus. To use RD0-7 for

alternate functions, nROMCS must stay high until those pins are finished being programmed.

Note 3 These pins cannot be programmed as open drain pins in their original function.

REFERENCE DOCUMENTS

§ SMSC Consumer Infrared Communications Controller (CIrCC) V1.X

§ IEEE 1284 Extended Capabilities Port Protocol and ISA Standard, Rev. 1.14, July 14, 1993.

§ Hardware Description of the 8042, Intel 8 bit Embedded Controller Handbook.

§ PCI Bus Power Management Interface Specification, Rev. 1.0, Draft, March 18, 1997.

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