FDC37B78X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37B78X
SMSC -> Microchip
FDC37B78X Datasheet PDF : 258 Pages
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LOGICAL DEVICE
REGISTER
Interrupt Select
Defaults :
0x70 = 0x00,
on Vcc POR or
Reset_Drv
0x72 = 0x00,
on Vcc POR or
Reset_Drv
DMA Channel
Select
Default = 0x04
on Vcc POR or
Reset_Drv
32-Bit Memory
Space Configuration
Logical Device
Logical Device
Config.
Reserved
ADDRESS
(0x70,072)
(0x71,0x73)
(0x74,0x75)
(0x76-0xA8)
(0xA9-0xDF)
(0xE0-0xFE)
0xFF
DESCRIPTION
0x70 is implemented for each logical device. Refer
to Interrupt Configuration Register description.
Only the keyboard controller uses Interrupt Select
register 0x72. Unused register (0x72) will ignore
writes and return zero when read. Interrupts
default to edge high (ISA compatible).
Reserved - not implemented. These register
locations ignore writes and return zero when read.
Only 0x74 is implemented for FDC, Serial Port 2
and Parallel port. 0x75 is not implemented and
ignores writes and returns zero when read. Refer
to DMA Channel Configuration.
Reserved - not implemented. These register
locations ignore writes and return zero when read.
Reserved - not implemented. These register
locations ignore writes and return zero when read.
Reserved - Vendor Defined (see SMSC defined
Logical Device Configuration Registers)
Reserved
STATE
C
C
C
C
C
Note 1:A logical device will be active and powered up according to the following equation:
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or clearing one
sets or clears the other.
Note: If the I/O Base Addr of the logical device is not within the Base I/O range as shown in the
Logical Device I/O map, then read or write is not valid and is ignored.
Note 2. The activate bit for Logical Device 5 (Serial Port 2) is reset on Vtr POR only.
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