FDC37B78X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37B78X

Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

SMSC -> Microchip 

SERIAL PORT (UART)

The chip incorporates two full function UARTs.

They are compatible with the NS16450, the

16450 ACE registers and the NS16C550A. The

UARTS perform serial-to-parallel conversion on

received characters and parallel-to-serial

conversion on transmit characters. The data

rates are independently programmable from

460.8K baud down to 50 baud. The character

options are programmable for 1 start; 1, 1.5 or 2

stop bits; even, odd, sticky or no parity; and

prioritized interrupts. The UARTs each contain a

programmable baud rate generator that is

capable of dividing the input clock or crystal by

a number from 1 to 65535. The UARTs are also

capable of supporting the MIDI data rate. Refer

to the Configuration Registers for information on

disabling, power down and changing the base

address of the UARTs. The interrupt from a

UART is enabled by programming OUT2 of that

UART to a logic "1". OUT2 being a logic "0"

disables that UART's interrupt. The second

UART also supports IrDA 1.0, HP-SIR, ASK-IR

and Consumer IR infrared modes of operation.

Note: The UARTs may be configured to share

an interrupt. Refer to the Configuration section

for more information.

REGISTER DESCRIPTION

Addressing of the accessible registers of the

Serial Port is shown below. The configuration

registers (see Configuration section) define the

base addresses of the serial ports. The Serial

Port registers are located at sequentially

increasing addresses above these base

addresses. The chip contains two serial ports,

each of which contain a register set as

described below.

TABLE 33 - ADDRESSING THE SERIAL PORT

DLAB* A2

A1

A0

REGISTER NAME

0

0

0

0 Receive Buffer (read)

0

0

0

0 Transmit Buffer (write)

0

0

0

1 Interrupt Enable (read/write)

X

0

1

0 Interrupt Identification (read)

X

0

1

0 FIFO Control (write)

X

0

1

1 Line Control (read/write)

X

1

0

0 Modem Control (read/write)

X

1

0

1 Line Status (read/write)

X

1

1

0 Modem Status (read/write)

X

1

1

1 Scratchpad (read/write)

1

0

0

0 Divisor LSB (read/write)

1

0

0

1 Divisor MSB (read/write

*Note: DLAB is Bit 7 of the Line Control Register

71

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