nAEN
A0-A9
nIDEENLO,
nIDEENHI,
nHDCSx,
nGAMECS
t2
t3
t1
FIGURE 28 - IDE INTERFACE TIMING
NAME
DESCRIPTION
t1 nIDEENLO, nIDEENHI, nGAMECS, nHDCSx Delay
from nAEN
t2 nIDEENLO, nIDEENHI, nGAMECS, nHDCSx Delay
from A0 - A9
t3 nIDEENLO Delay from nIDEENHI, AEN
MIN TYP MAX UNITS
40
ns
40
ns
40
ns
260