LAYOUT PROCEDURE
To get high efficiency, good regulation, and stability, a well-
designed printed circuit board layout is required. Where
possible, use the sample application board layout as a model.
Follow these guidelines when designing printed circuit boards
(see Figure 1):
• Keep the low ESR input capacitor, CIN, close to IN and
GND.
• Keep the high current path from CIN through the inductor
L1 to SW and PGND as short as possible.
• Keep the high current path from CIN through L1, the
rectifier D1, and the output capacitor COUT as short as
possible.
• Keep high current traces as short and as wide as possible.
• Place the feedback resistors as close to the FB pin as
possible to prevent noise pickup.
• Place the compensation components as close as possible to
COMP.
• Avoid routing high impedance traces near any node
connected to SW or near the inductor to prevent radiated
noise injection.
ADP1610
Figure 32. Sample Application Board (Top Layer)
Figure 31. Sample Application Board (Bottom Layer)
Figure 33. Sample Application Board (Silkscreen Layer)
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