LH28F800BGE-BL12 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
Manufacturer
LH28F800BGE-BL12 Datasheet PDF : 43 Pages
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LH28F800BG-L/BGH-L (FOR TSOP, CSP)
6.2.1 CAPACITANCE (NOTE 1)
SYMBOL
PARAMETER
CIN
Input Capacitance
COUT
Output Capacitance
NOTE :
1. Sampled, not 100% tested.
TA = +25˚C, f = 1 MHz
TYP.
MAX.
7
10
9
12
UNIT
pF
pF
CONDITION
VIN = 0.0 V
VOUT = 0.0 V
6.2.2 AC INPUT/OUTPUT TEST CONDITIONS
2.7
INPUT
1.35
TEST POINTS
1.35 OUTPUT
0.0
AC test inputs are driven at 2.7 V for a Logic "1" and 0.0 V for a Logic "0". Input timing begins, and output
timing ends, at 1.35 V. Input rise and fall times (10% to 90%) < 10 ns.
Fig. 7 Transient Input/Output Reference Waveform for VCC = 2.7 to 3.6 V
3.0
INPUT
1.5
TEST POINTS
1.5 OUTPUT
0.0
AC test inputs are driven at 3.0 V for a Logic "1" and 0.0 V for a Logic "0". Input timing begins, and output
timing ends, at 1.5 V. Input rise and fall times (10% to 90%) < 10 ns.
Fig. 8 Transient Input/Output Reference Waveform for VCC = 3.3±0.3 V and
VCC = 5.0±0.25 V (High Speed Testing Configuration)
2.4
INPUT
0.45
2.0
TEST POINTS
0.8
2.0
OUTPUT
0.8
AC test inputs are driven at VOH (2.4 VTTL) for a Logic "1" and VOL (0.45 VTTL) for a Logic "0". Input timing
begins at VIH (2.0 VTTL) and VIL (0.8 VTTL). Output timing ends at VIH and VIL. Input rise and fall times (10% to
90%) < 10 ns.
Fig. 9 Transient Input/Output Reference Waveform for
VCC = 5.0±0.5 V (Standard Testing Configuration)
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