MAX11213EEE(2010) View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX11213EEE
(Rev.:2010)

16-Bit, Single-Channel, Ultra-Low-Power, Delta- Sigma ADCs with Programmable Gain and GPIO

Maxim Integrated

MAX11213EEE Datasheet PDF : 27 Pages

First Prev 21 22 23 24 25 26 27

16-Bit, Single-Channel, Ultra-Low-Power, Delta-

Sigma ADCs with Programmable Gain and GPIO

DATA: Data Register

The data register is a 24-bit read-only register. Any attempt to write data to the data register has no effect. The data

read from this register is clocked out MSB first. The data register holds the conversion result. D15 is the MSB, and D0

is the LSB. The result is stored in a format according to the FORMAT bit in the CTRL1 register.

The data format while in unipolar mode is always straight binary. In straight binary format, the most negative value is

0x0000 (VAINP - VAINN = 0V), the midscale value is 0x8000 (VAINP - VAINN = VREF/2), and the most positive value is

0xFFFF (VAINP - VAINN = VREF).

In bipolar mode, if the FORMAT bit = 1, then the data format is offset binary. If the FORMAT bit = 0, then the data format

is two’s complement. In two’s complement the negative full-scale value is 0x8000 (VAINP - VAINN = -VREF), the midscale

is 0x0000 (VAINP - VAINN = 0V), and the positive full scale is 0x7FFF (VAINP - VAINN = VREF). Any input exceeding the

available input range is limited to the minimum or maximum data value.

Table 15. DATA Register (Read Only)

BIT

D15

D14

D13

D12

D11

D10

DEFAULT

BIT

DEFAULT

BIT

DEFAULT

Table 16a. Output Data Format for the Unipolar Input Range

INPUT VOLTAGE

VAINP - VAINN

≥ VREF

VREF

1−



2 24





− 1

DIGITAL OUTPUT CODE FOR UNIPOLAR RANGE

STRAIGHT BINARY FORMAT

0xFFFF

0xFFFE

VREF

224 − 1

0x0001

0x0000

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