MAX3669(1999) View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX3669
(Rev.:1999)

+3.3V, 622Mbps SDH/SONET Laser Driver with Current Monitors and APC

Maxim Integrated 

+3.3V, 622Mbps SDH/SONET

Laser Driver with Current Monitors and APC

Resistor graph in the Typical Operating Character-

istics and select the value of RBIASMAX that corre-

sponds to the required current at +25°C.

When using the MAX3669 in closed-loop operation, the

RBIASMAX resistor sets the maximum bias current avail-

able to the laser diode over temperature and life. The

APC loop can subtract from this maximum value but

cannot add to it. See the Bias Current vs. Maximum

Bias Set Resistor graph in the Typical Operating

Characteristics and select the value of RBIASMAX that

corresponds to the end-of-life bias current at +85°C.

Programming the APC Loop

When the MAX3669’s APC feature is used, program the

average optical power by adjusting the APCSET resis-

tor. To select this resistor, determine the desired moni-

tor current to be maintained over temperature and life.

See the Monitor Diode Current vs. APC Set Resistor

graph in the Typical Operating Characteristics and

select the value of RAPCSET that corresponds to the

required current.

Interfacing with the Laser Diode

To minimize optical output aberrations due to the laser

parasitic inductance, an RC shunt network may be

used (see Typical Operating Circuit). If RL represents

the laser diode resistance, the recommended total

resistance for RD + RL is 10Ω. Starting values for coaxi-

al lasers are RFILT = 20Ω and CFILT = 5pF. RFILT and

CFILT should be experimentally adjusted to optimize

the output waveform. A bypass capacitor should also

be placed as close to the laser anode as possible for

best performance.

Pattern-Dependent Jitter (PDJ)

When transmitting NRZ data with long strings of consec-

utive identical digits (CIDs), LF droop can contribute to

PDJ. To minimize this PDJ, two external components

must be properly chosen: capacitor CAPC, which domi-

nates the APC loop time constant, and AC-coupling

capacitor CD.

To filter out noise effects and guarantee loop stability,

the recommended value for CAPC is 0.1µF. This results

in an APC loop bandwidth of 20kHz. Consequently, the

PDJ associated with an APC loop time constant can be

ignored.

The time constant associated with the DC blocking

capacitor on IMOD will have an effect on PDJ. It is

important that this time constant produce minimum

droop for long consecutive bit streams.

Referring to Figure 4, the droop resulting from long time

periods without transitions can be represented by the

following equation:

-t

(100% - DROOP) = e τ

AC-coupling of IMOD results in a discharge level for τ

that is equal to PAVG. An overall droop of 6% relative to

Pp-p equates to a 12% droop relative to PAVG. To

ensure a droop of less than 12% (6% relative to Pp-p),

this equation can be solved for τ as follows:

τ

=

ln(1

-t

- 0.12)

=

7.8t

If t1 equals 80 consecutive unit intervals without a tran-

sition, the time constant associated with the DC block-

ing capacitor needs to be longer than:

τAC ≥ RACCD = 7.8 (80 bits) (1.6ns/bit) = 1.0µs

RFILT can be ignored for CFILT<< CD; therefore, the

estimated value of RAC is:

RAC = 20Ω  (RD + rLASER)

Assuming RD = 5Ω, and rLASER = 5Ω:

RAC = 6.7Ω

with CD = 1µF, τAC = 6.7µs.

Input Termination Requirement

The MAX3669 data inputs are PECL compatible.

However, it is not necessary to drive the MAX3669 with

a standard PECL signal. As long as the specified com-

mon-mode voltage and differential voltage swings are

met, the MAX3669 will operate properly.

Pp-p PAVG

Figure 4. Droop

τ=∞

τAC

τ << τAC

DROOP

t1

t

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