PIC16F870-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F870-I/SO

28/40-Pin, 8-Bit CMOS FLASH Microcontrollers

Microchip Technology 

PIC16F870/871

2.2.2.4 PIE1 REGISTER

The PIE1 Register contains the individual enable bits

for the peripheral interrupts.

REGISTER 2-4: PIE1 REGISTER (ADDRESS 8Ch)

Note: Bit PEIE (INTCON<6>) must be set to

enable any peripheral interrupt.

R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0

PSPIE(1) ADIE RCIE TXIE

 CCP1IE TMR2IE TMR1IE

bit7

bit0

bit 7:

bit 6:

bit 5:

bit 4:

bit 3:

bit 2:

bit 1:

bit 0:

PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bit

1 = Enables the PSP read/write interrupt

0 = Disables the PSP read/write interrupt

ADIE: A/D Converter Interrupt Enable bit

1 = Enables the A/D converter interrupt

0 = Disables the A/D converter interrupt

RCIE: USART Receive Interrupt Enable bit

1 = Enables the USART receive interrupt

0 = Disables the USART receive interrupt

TXIE: USART Transmit Interrupt Enable bit

1 = Enables the USART transmit interrupt

0 = Disables the USART transmit interrupt

Unimplemented: Read as ‘0’

CCP1IE: CCP1 Interrupt Enable bit

1 = Enables the CCP1 interrupt

0 = Disables the CCP1 interrupt

TMR2IE: TMR2 to PR2 Match Interrupt Enable bit

1 = Enables the TMR2 to PR2 match interrupt

0 = Disables the TMR2 to PR2 match interrupt

TMR1IE: TMR1 Overflow Interrupt Enable bit

1 = Enables the TMR1 overflow interrupt

0 = Disables the TMR1 overflow interrupt

R = Readable bit

W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n= Value at POR reset

Note 1: PSPIE is reserved on the PIC16F870; always maintain this bit clear.

© 1999 Microchip Technology Inc.

Preliminary

DS30569A-page 19

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