PIC16F870-I/SO View Datasheet(PDF) - Microchip Technology
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PIC16F870-I/SO Datasheet PDF : 156 Pages
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PIC16F870/871
TABLE 11-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
W
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF
870 871
N/A
N/A
N/A
TMR0
PCL
STATUS
870 871
870 871
870 871
xxxx xxxx
0000h
0001 1xxx
uuuu uuuu
0000h
000q quuu(3)
uuuu uuuu
PC + 1(2)
uuuq quuu(3)
FSR
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTA
870 871
--0x 0000
--0u 0000
--uu uuuu
PORTB
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTC
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTD
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTE
870 871
---- -xxx
---- -uuu
---- -uuu
PCLATH
INTCON
PIR1
PIR2
870 871
870 871
870 871
870 871
870 871
---0 0000
0000 000x
r000 -000
0000 -000
---0 ----
---0 0000
0000 000u
r000 -000
0000 -000
---0 ----
---u uuuu
uuuu uuuu(1)
ruuu -uuu(1)
uuuu -uuu(1)
---u ----(1)
TMR1L
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1H
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
870 871
--00 0000
--uu uuuu
--uu uuuu
TMR2
870 871
0000 0000
0000 0000
uuuu uuuu
T2CON
870 871
-000 0000
-000 0000
-uuu uuuu
CCPR1L
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1H
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
870 871
--00 0000
--00 0000
--uu uuuu
RCSTA
870 871
0000 000x
0000 000x
uuuu uuuu
TXREG
870 871
0000 0000
0000 0000
uuuu uuuu
RCREG
870 871
0000 0000
0000 0000
uuuu uuuu
ADRESH
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
870 871
0000 00-0
0000 00-0
uuuu uu-u
OPTION_REG 870 871
1111 1111
1111 1111
uuuu uuuu
TRISA
870 871
--11 1111
--11 1111
--uu uuuu
TRISB
870 871
1111 1111
1111 1111
uuuu uuuu
TRISC
870 871
1111 1111
1111 1111
uuuu uuuu
TRISD
870 871
1111 1111
1111 1111
uuuu uuuu
TRISE
870 871
0000 -111
0000 -111
uuuu -uuu
PIE1
870 871
r000 -000
r000 -000
ruuu -uuu
870 871
0000 0000
0000 0000
uuuu uuuu
PIE2
870 871
---0 ----
---0 ----
---u ----
PCON
870 871
---- --qq
---- --uu
---- --uu
PR2
870 871
1111 1111
1111 1111
1111 1111
TXSTA
870 871
0000 -010
0000 -010
uuuu -uuu
SPBRG
870 871
0000 0000
0000 0000
uuuu uuuu
ADRESL
870 871
xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends
on condition, r = reserved maintain clear.
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the inter-
rupt vector (0004h).
3: See Table 11-5 for reset value for specific condition.
DS30569A-page 96
Preliminary
© 1999 Microchip Technology Inc.
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