PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 Type
Buffer
Type
Description
PORTB is a bidirectional I/O port. PORTB
can be software programmed for internal
weak pull-ups on all inputs.
RB0/INT0
RB0
INT0
48
58
I/O
TTL
Digital I/O.
I
ST
External interrupt 0.
RB1/INT1
RB1
INT1
47
57
I/O
TTL
Digital I/O.
I
ST
External interrupt 1.
RB2/INT2
RB2
INT2
46
56
I/O
TTL
Digital I/O.
I
ST
External interrupt 2.
RB3/INT3/CCP2
45
55
RB3
I/O
TTL
Digital I/O.
INT3
CCP2(1)
I/O
ST
I/O
ST
External interrupt 3.
Capture2 input, Compare2 output,
PWM2 output.
RB4/KBI0
RB4
KBI0
44
54
I/O
TTL
Digital I/O.
I
ST
Interrupt-on-change pin.
RB5/KBI1/PGM
RB5
KBI1
PGM
RB6/KBI2/PGC
RB6
KBI2
PGC
43
53
I/O
TTL
Digital I/O.
I
ST
Interrupt-on-change pin.
I/O
ST
Low-Voltage ICSP Programming enable
pin.
42
52
I/O
TTL
Digital I/O.
I
ST
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and
ICSP programming clock.
RB7/KBI3/PGD
RB7
KBI3
PGD
37
47
I/O
TTL
Digital I/O.
I/O
ST
Interrupt-on-change pin.
In-Circuit Debugger and
ICSP programming data.
Legend:
Note 1:
2:
3:
4:
5:
6:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
Default assignment when CCP2MX is set.
External memory interface functions are only available on PIC18F8X20 devices.
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
2003-2013 Microchip Technology Inc.
DS39609C-page 13