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PIC18LF8520-IPT301 View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18LF8520-IPT301 Datasheet PDF : 380 Pages
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PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 Type
Buffer
Type
Description
PORTJ is a bidirectional I/O port(5).
RJ0/ALE
RJ0
ALE
62
I/O
ST
Digital I/O.
O
TTL
External memory address latch enable.
RJ1/OE
RJ1
OE
61
I/O
ST
Digital I/O.
O
TTL
External memory output enable.
RJ2/WRL
RJ2
WRL
60
I/O
ST
Digital I/O.
O
TTL
External memory write low control.
RJ3/WRH
RJ3
WRH
59
I/O
ST
Digital I/O.
O
TTL
External memory write high control.
RJ4/BA0
RJ4
BA0
39
I/O
ST
Digital I/O.
O
TTL
External memory Byte Address 0 control.
RJ5/CE
RJ5
CE
40
I/O
ST
Digital I/O.
O
TTL
External memory chip enable control.
RJ6/LB
RJ6
LB
41
I/O
ST
Digital I/O.
O
TTL
External memory low byte select.
RJ7/UB
RJ7
UB
42
I/O
ST
Digital I/O.
O
TTL
External memory high byte select.
VSS
9, 25,
11, 31,
P
— Ground reference for logic and I/O pins.
41, 56
51, 70
VDD
AVSS(6)
AVDD(6)
10, 26,
38, 57
20
19
12, 32,
P
48, 71
26
P
25
P
— Positive supply for logic and I/O pins.
— Ground reference for analog modules.
— Positive supply for analog modules.
Legend:
Note 1:
2:
3:
4:
5:
6:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
Default assignment when CCP2MX is set.
External memory interface functions are only available on PIC18F8X20 devices.
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DS39609C-page 20
2003-2013 Microchip Technology Inc.

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