PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F8520-IPT301

64/80-Pin High-Performance, 256 Kbit to 1 MbitEnhanced Flash Microcontrollers with A/D

Microchip Technology 

PIC18F6520/8520/6620/8620/6720/8720

TABLE 26-25: A/D CONVERTER CHARACTERISTICS: PIC18FXX20 (INDUSTRIAL, EXTENDED)

PIC18LFXX20 (INDUSTRIAL)

Param

No.

Symbol

Characteristic

Min

Typ

Max

Units

Conditions

A01 NR

Resolution

—

—

10

bit

A03 EIL

Integral Linearity Error

—

—

<±1

LSb VREF = VDD = 5.0V

A04 EDL

Differential Linearity Error

—

—

<±1

LSb VREF = VDD = 5.0V

A05 EG

Gain Error

—

—

<±1

LSb VREF = VDD = 5.0V

A06 EOFF Offset Error

A10 —

Monotonicity

—

—

<±1.5

guaranteed(2)

LSb VREF = VDD = 5.0V

— VSS  VAIN  VREF

A20 VREF

A20A

Reference Voltage

(VREFH – VREFL)

1.8V

—

—

V VDD < 3.0V

3V

—

—

V VDD  3.0V

A21 VREFH Reference Voltage High

A22 VREFL Reference Voltage Low

A25 VAIN

Analog Input Voltage

AVSS

— AVDD + 0.3V V

AVSS – 0.3V(5) —

VREFH

V

AVSS – 0.3V(5) — AVDD + 0.3V(5) V VDD  2.5V (Note 3)

A30 ZAIN

Recommended Impedance of

—

Analog Voltage Source

—

2.5

k (Note 4)

A50 IREF

VREF Input Current (Note 1)

—

—

—

5

A During VAIN acquisition.

—

150

A During A/D conversion

cycle.

Note 1:

2:

3:

4:

5:

Vss  VAIN  VREF

The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.

For VDD < 2.5V, VAIN should be limited to <.5 VDD.

Maximum allowed impedance for analog voltage source is 10 k. This requires higher acquisition times.

IVDD – AVDDI must be <3.0V and IAVSS – VSSI must be <0.3V.

FIGURE 26-26: A/D CONVERSION TIMING

BSF ADCON0, GO

(Note 2)

131

Q4

130

A/D CLK 132

A/D DATA

9

8 7 ... ... 2

1

0

ADRES

ADIF

GO

SAMPLE

OLD_DATA

SAMPLING STOPPED

NEW_DATA

TCY

DONE

Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be

executed.

2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.

DS39609C-page 338

 2003-2013 Microchip Technology Inc.

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