4 Mbit SuperFlash EEPROM
SST28SF040A / SST28VF040A
32
Data Sheet
CL
Pin #1 Identifier
1
.075
.065
1.655
1.645
.625
.600
.550
.530
7˚
4 PLCS.
Base
Plane
Seating
Plane .050
.015
.080
.065
.070
.045
.200
.170
.012
.150
.008
.022
.100 BSC .120
.016
0˚
15˚
.600 BSC
Note: 1. Complies with JEDEC publication 95 MO-015 AP dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in inches (max/min).
3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches.
32-pdip-PH-3
32-PIN PLASTIC DUAL IN-LINE PINS (PDIP)
SST PACKAGE CODE: PH
TABLE 14: REVISION HISTORY
Number
04 • 2002 Data Book
Description
05 • Removed WH package
• Part number changes - see page 22 for additional information
• Clarified the Test Conditions for VDD Read Current parameter in Table 6 and
Table 7 on page 8
– Address input = VILT/VIHT
Date
May 2002
Mar 2003
©2003 Silicon Storage Technology, Inc.
25
S71077-05-000 3/03 310