ST72E121J4D0 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72E121J4D0

8-BIT MCU WITH 8 TO 16K OTP/EPROM, 384 TO 512 BYTES RAM, WDG, SCI, SPI AND 2 TIMERS

STMicroelectronics 

ST72E121 ST72T121

3.4 POWER SAVING MODES

3.4.1 Introduction

There are three Power Saving modes. Slow Mode

is selected by setting the relevant bits in the Mis-

cellaneous register. Wait and Halt modes may be

entered using the WFI and HALT instructions.

Figure 16. WAIT Flow Chart

WFI INSTRUCTION

3.4.2 Slow Mode

In Slow mode, the oscillator frequency can be di-

vided by a value defined in the Miscellaneous

Register. The CPU and peripherals are clocked at

this lower frequency. Slow mode is used to reduce

power consumption, and enables the user to adapt

clock frequency to available supply voltage.

OSCILLATOR

PERIPH. CLOCK

CPU CLOCK

I-BIT

ON

ON

OFF

CLEARED

3.4.3 Wait Mode

Wait mode places the MCU in a low power con-

sumption mode by stopping the CPU. All peripher-

als remain active. During Wait mode, the I bit (CC

Register) is cleared, so as to enable all interrupts.

All other registers and memory remain unchanged.

The MCU will remain in Wait mode until an Inter-

rupt or Reset occurs, whereupon the Program

Counter branches to the starting address of the In-

terrupt or Reset Service Routine.

The MCU will remain in Wait mode until a Reset or

an Interrupt occurs, causing it to wake up.

Refer to Figure 16 below.

N

N

INTERRUPT

RESET

Y

OSCILLATOR

ON

Y

PERIPH. CLOCK ON

CPU CLOCK

ON

I-BIT

SET

4096 CPU CLOCK

CYCLES DELAY

OSCILLATOR

PERIPH. CLOCK

CPU CLOCK

I-BI T

ON

ON

ON

SET

FETCH RESET VECTOR

OR SERVICE INTERRUPT

Note: Before servicing an interrupt, the CC register is

pushed on the stack. The I-Bit is set during the inter-

rupt routine and cleared when the CC register is

popped.

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