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ST72E121J4D0 View Datasheet(PDF) - STMicroelectronics

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Description
Manufacturer
ST72E121J4D0 Datasheet PDF : 92 Pages
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ST72E121 ST72T121
PERIPHERAL CHARACTERISTICS (Cont’d)
Measurement points are VOL, VOH, VIL and VIH in the SPI Timing Diagram
Figure 46. SPI Slave Timing Diagram CPHA=0, CPOL=0
SS
(INPUT)
2
SCK
(INP UT)
MISO HIGH-Z
(OUTPU T) 8
MOSI
(INPUT)
6
4
D7-OUT
10
D7-IN
7
1
13
5
D6-OUT
11
D6-IN
Figure 47. SPI Slave Timing Diagram CPHA=0, CPOL=1
12
3
D0-OUT
D0-IN
9
VR000113
SS
(INPUT)
2
SCK
(INP UT)
MISO HIGH-Z
(OUTPU T)
8
MOSI
(INPUT)
6
5
D7-OUT
10
D7-IN
7
1
12
4
D6-OUT
11
D6-IN
Figure 48. SPI Slave Timing Diagram CPHA=1, CPOL=0
SS
(INPU T)
SCK
(INPUT)
MISO
(OUTPUT)
MOSI
(INP UT)
2
HIGH-Z
8
1
4
5
D7-OUT
10
D7-IN
6
7
13
D6-OUT
D6-IN
13
3
D0-OUT
D0-IN
9
VR000114
12
3
D0-OUT
11
9
D0-IN
VR000111
Figure 49. SPI Slave Timing Diagram CPHA=1, CPOL=1
SS
(INPU T)
SCK
(INPUT)
MIS O
(OUTPUT)
MOSI
(INP UT)
2
HIGH-Z
8
1
5
4
D7-OUT
10
D7-IN
6
7
12
D6-OUT
D6-IN
13
3
D0-OUT
11
9
D0-IN
VR000112
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