Z80230 View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z80230

Zilog SCC Serial Communication Controller

Zilog 

Application Note

SCC in Binary Synchronous Communications

Reset

Switch

NMI

Switch

Address

Data

Reset

Non-maskable

Interrupt

Segment

Address

Status

Address/

Data

Buffer

Segment

Address

Buffer

Status

Decoder

Wire Wrap Area

Serial

RS-232C

Output

Buffers

Serial

Channels

(2)

9

Z80A PIO's

(2)

Z80A CTC

SIO2

ADDRESS/DATA BUS

Control

Inputs

Buffer

External

Clock

In/Out

Control

Out

Clock

I/O

Control

I/O BUS

Eprom

Control

EPROM CONTROL BUS

Eprom

Memory

(8k Words Max)

Ram

Control RAM CONTROL BUS

Dynamic

Ram Memory

(32k Words Max)

Clock

Generator

Figure 2. Block Diagram of Z8000 DM

Z8002

Z-SCC

Local

TxD

TRxC

RTxC

RxD

RxD

RTxC

TRxC

TxD

Z8002

Z-SCC

Remote

Figure 3. Block Diagram of Two Z8000 Development Modules

UM010901-0601

6-81

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