Lattice Semiconductor
DC and Switching Characteristics
MachXO Family Data Sheet
Flash Download Time
Symbol
tREFRESH
Parameter
Minimum VCC or VCCAUX
(later of the two supplies)
to Device I/O Active
LCMXO256
LCMXO640
LCMXO1200
LCMXO2280
Min.
Typ.
Max.
—
—
0.4
—
—
0.6
—
—
0.8
—
—
1.0
JTAG Port Timing Specifications
Symbol
fMAX
tBTCP
tBTCPH
tBTCPL
tBTS
tBTH
tBTRF
tBTCO
tBTCODIS
tBTCOEN
tBTCRS
tBTCRH
tBUTCO
tBTUODIS
tBTUPOEN
Rev. A 0.19
Parameter
TCK [BSCAN] clock frequency
TCK [BSCAN] clock pulse width
TCK [BSCAN] clock pulse width high
TCK [BSCAN] clock pulse width low
TCK [BSCAN] setup time
TCK [BSCAN] hold time
TCK [BSCAN] rise/fall time
TAP controller falling edge of clock to output valid
TAP controller falling edge of clock to output disabled
TAP controller falling edge of clock to output enabled
BSCAN test capture register setup time
BSCAN test capture register hold time
BSCAN test update register, falling edge of clock to output valid
BSCAN test update register, falling edge of clock to output disabled
BSCAN test update register, falling edge of clock to output enabled
Min.
—
40
20
20
8
10
50
—
—
—
8
25
—
—
—
Max.
25
—
—
—
—
—
—
10
10
10
—
—
25
25
25
Figure 3-5. JTAG Port Timing Waveforms
TMS
Units
ms
ms
ms
ms
Units
MHz
ns
ns
ns
ns
ns
mV/ns
ns
ns
ns
ns
ns
ns
ns
ns
TDI
TCK
TDO
Data to be
captured
from I/O
Data to be
driven out
to I/O
tBTCPH
tBTS
tBTCPL
tBTH
tBTCP
tBTCOEN
Valid Data
tBTCO
tBTCRS
tBTCRH
Data Captured
tBTUPOEN
tBUTCO
Valid Data
tBTCODIS
Valid Data
tBTUODIS
Valid Data
3-17