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LSM330DL View Datasheet(PDF) - STMicroelectronics

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LSM330DL Datasheet PDF : 54 Pages
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LSM330DL
7.45 INT1_DURATION_G (38h)
Table 106. INT1_DURATION_G register
WAIT
D6
D5
D4
D3
Registers description
D2
D1
D0
Table 107. INT1_DURATION_G description
WAIT
WAIT enable. Default value: 0 (0: disable; 1: enable)
D6 - D0
Duration value. Default value: 000 0000
The D6 - D0 bits set the minimum duration of the interrupt event to be recognized. The
duration of the steps and maximum values depend on the ODR chosen.
The WAIT bit has the following meaning:
Wait =’0’: the interrupt falls immediately if the signal crosses the selected threshold
Wait =’1’: if the signal crosses the selected threshold, the interrupt falls only after the
duration has counted the number of samples at the selected data rate, written into the
duration counter register.
Figure 13. Wait disabled
Doc ID 022018 Rev 1
49/54

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