PIC16F/LF1826/27
TABLE 17-2: SUMMARY OF REGISTERS ASSOCIATED WITH SR LATCH MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELA
—
—
—
ANSA4 ANSA3 ANSA2 ANSA1 ANSA0 125
SRCON0
SRLEN SRCLK2 SRCLK1 SRCLK0 SRQEN SRNQEN SRPS SRPR
161
SRCON1 SRSPE SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E 162
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 124
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the SR latch module.
2010 Microchip Technology Inc.
Preliminary
DS41391C-page 163