PIC18LF2220-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF2220-I/SO

28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2220/2320/4220/4320

TABLE 26-24: A/D CONVERTER CHARACTERISTICS: PIC18F2220/2320/4220/4320 (INDUSTRIAL)

PIC18F2220/2320/4220/4320 (EXTENDED)

PIC18LF2220/2320/4220/4320 (INDUSTRIAL)

Param

No.

Symbol

Characteristic

Min

Typ

Max Units

Conditions

A01 NR

Resolution

—

—

10

bit ∆VREF ≥ 3.0V

A03 EIL

Integral Linearity Error

—

—

<±1

LSb ∆VREF ≥ 3.0V

A04 EDL Differential Linearity Error

—

—

<±1

LSb ∆VREF ≥ 3.0V

A06 EOFF Offset Error

—

—

<±1

LSb ∆VREF ≥ 3.0V

A07 EGN Gain Error

—

—

<±1

LSb ∆VREF ≥ 3.0V

A10 —

Monotonicity

guaranteed(2)

—

A20 ∆VREF Reference Voltage Range

(VREFH – VREFL)

3

— AVDD – AVSS V For 10-bit resolution

A21 VREFH Reference Voltage High

AVSS + 3.0V — AVDD + 0.3V V For 10-bit resolution

A22 VREFL Reference Voltage Low

AVSS – 0.3V — AVDD – 3.0V V For 10-bit resolution

A25 VAIN Analog Input Voltage

VREFL

—

VREFH

V

A28 AVDD Analog Supply Voltage

VDD – 0.3

—

VDD + 0.3 V Tie to VDD

A29 AVSS Analog Supply Voltage

VSS – 0.3

—

VSS + 0.3 V Tie to VSS

A30 ZAIN Recommended Impedance of

—

—

2.5(4)

kΩ

Analog Voltage Source

A40 IAD

A/D Current PIC18FXX20

—

from VDD

PIC18LFXX20

—

—

180(5)

µA Average current during

—

90(5)

µA conversion(1)

A50 IREF VREF Input Current (3)

—

—

±5(5)

µA During VAIN acquisition.

—

—

±150(5)

µA During A/D conversion

cycle.

Note 1: When A/D is off, it will not consume any current other than minor leakage current. The power-down current

spec includes any such leakage from the A/D module.

2: The A/D conversion result never decreases with an increase in the input voltage and has no missing

codes.

3: VREFH current is from RA3/AN3/VREF+ pin or AVDD, whichever is selected as the VREFH source.

VREFL current is from RA2/AN2/VREF- pin or AVSS, whichever is selected as the VREFL source.

4: Assume quiet environment. If adjacent pins have high-frequency signals (analog or digital), ZAIN may need

to be reduced to as low as 1 kΩ to fight crosstalk effects.

5: For guidance only.

 2003 Microchip Technology Inc.

DS39599C-page 341

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