STM8S103xx, STM8S105xx
Electrical characteristics
Figure 27. Typical NRST pull-up resistance RPU vs VDD @ 4 temperatures
60
-40°C
25°C
55
85°C
125°C
50
45
40
35
30
2.5
3
3.5
4
4.5
5
5.5
6
VDD [V]
Figure 28. Typical NRST pull-up current Ipu vs VDD @ 4 temperatures
140
120
100
80
60
-40°C
25°C
40
85°C
20
125°C
0
0
1
2
3
4
5
6
VDD [V]
The reset network shown in Figure 29 protects the device against parasitic resets. The user
must ensure that the level on the NRST pin can go below the VIL max. level specified in
Table 14. Otherwise the reset is not taken into account internally.
Figure 29. Recommended reset pin protection
VDD
STM8
External
reset
circuit
0.01µF
NRST
RPU
Filter
Internal reset
45/56