M45PE80-VMN6TP View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

M45PE80-VMN6TP

Micron Serial NOR Flash Memory

Micron Technology 

75MHz, Serial Peripheral Interface Flash Memory

WRITE DISABLE

WRITE DISABLE

The WRITE DISABLE command resets the write enable latch (WEL) bit.

The WRITE DISABLE command is entered by driving chip select (S#) LOW, sending the

command code, and then driving S# HIGH.

The WEL bit is reset under the following conditions:

• Power-up

• Completion of WRITE DISABLE operation

• Completion of PAGE WRITE operation

• Completion of PAGE PROGRAM operation

• Completion of PAGE ERASE operation

• Completion of SECTOR ERASE operation

Figure 7: WRITE DISABLE Command Sequence

0

C

S#

DQ[0]

DQ1

0

MSB

1

2

3

4

0

0

High-Z

Command bits

0

0

5

1

6

0

7

LSB

0

Don’t Care

PDF: 09005aef845660e5

m45pe80.pdf - Rev. C 03/14 EN

18

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2011 Micron Technology, Inc. All rights reserved.

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