Z8F012A View Datasheet(PDF) - Zilog
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Z8F012A Datasheet PDF : 282 Pages
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Z8 Encore! XPยฎ F082A Series
Product Specification
213
Table 128. eZ8 CPU Instruction Summary (Continued)
Assembly๏
Mnemonic
Symbolic Operation
Address
Mode
dst src
Opcode(s)
Flags
Fetch Instr.
Cycle Cycle
(Hex) C Z S V D H s
s
AND dst, src dst ๏ฌ dst AND src
r
r
52
โ* *0โโ 2
3
r
Ir
53
2
4
R
R
54
3
3
R IR
55
3
4
R IM
56
3
3
IR IM
57
3
4
ANDX dst, src dst ๏ฌ dst AND src
ER ER
58
โ* *0โโ 4
3
ER IM
59
4
3
ATM
Block all interrupt and
DMA requests during
execution of the next
3 instructions
2F
โโโโโโ 1
2
BCLR bit, dst dst[bit] ๏ฌ 0
r
E2
โโโโโโ 2
2
BIT p, bit, dst dst[bit] ๏ฌ p
r
E2
โโโโโโ 2
2
BRK
Debugger Break
00
โโโโโโ 1
1
BSET bit, dst dst[bit] ๏ฌ 1
r
E2
โโโโโโ 2
2
BSWAP dst
dst[7:0] ๏ฌ dst[0:7]
R
D5 X * * 0 โ โ 2
2
BTJ p, bit, src, if src[bit] = p๏
dst
PC ๏ฌ PC + X
r
F6
โโโโโโ 3
3
Ir
F7
3
4
BTJNZ bit, src, if src[bit] = 1๏
dst
PC ๏ฌ PC + X
r
F6
โโโโโโ 3
3
Ir
F7
3
4
BTJZ bit, src, if src[bit] = 0๏
dst
PC ๏ฌ PC + X
r
F6
โโโโโโ 3
3
Ir
F7
3
4
Note: Flags Notation:
* = Value is a function of the result of the operation.๏
โ = Unaffected.๏
X = Undefined.
0 = Reset to 0.๏
1 = Set to 1.
PS022827-1212
PRELIMINARY
eZ8 CPU Instruction Summary
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