Z8F012APJ020SG View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z8F012APJ020SG

High-Performance 8-Bit Microcontrollers Z8 Encore! XP® F082A Series

Zilog 

Z8 Encore! XP® F082A Series

Product Specification

69

Interrupt Control Register

The Interrupt Control (IRQCTL) Register, shown in Table 49, contains the master enable

bit for all interrupts.

Table 49. Interrupt Control Register (IRQCTL)

Bit

7

6

5

4

3

2

1

0

Field

IRQE

Reserved

RESET

0

0

0

0

0

0

0

0

R/W

R/W

R

R

R

R

R

R

R

Address

FCFH

Bit

[7]

IRQE

[6:0]

Description

Interrupt Request Enable

This bit is set to 1 by executing an EI (Enable Interrupts) or IRET (Interrupt Return) instruction,

or by a direct register write of a 1 to this bit. It is reset to 0 by executing a DI instruction, eZ8

CPU acknowledgement of an interrupt request, Reset or by a direct register write of a 0 to this

bit.

0 = Interrupts are disabled.

1 = Interrupts are enabled.

Reserved

These bits are reserved and must be programmed to 0000000.

PS022827-1212

PRELIMINARY

Interrupt Control Register Definitions

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