OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
OR2T15B7BA352-DB Datasheet PDF : 200 Pages
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Data Sheet
November 2006
ORCA Series 2 FPGAs
Timing Characteristics (continued)
Table 52A. OR2CxxA/OR2TxxA Slave Serial Configuration Mode Timing Characteristics
OR2CxxA Commercial: VDD = 5.0 V ± 5%, 0 °C ≤ TA ≤ 70 °C; OR2CxxA Industrial: VDD = 5.0 V ± 10%, –40 °C ≤ TA ≤ +85 °C.
OR2TxxA Commercial: VDD = 3.0 V to 3.6 V, 0 °C ≤ TA ≤ 70 °C; OR2TxxA Industrial: VDD = 3.0 V to 3.6 V, –40 °C ≤ TA ≤ +85 °C
Parameter
Symbol
Min
Max
DIN Setup Time
TS
20
—
DIN Hold Time
TH
0
—
S CCLK High Time
TCH
50
—
CCLK Low Time
TCL
50
—
E CCLK Frequency
FC
—
10
CCLK to DOUT
TD
—
30
IC Note: Serial configuration data is transmitted out on DOUT on the falling edge of CCLK after it is input on DIN.
Unit
ns
ns
ns
ns
MHz
ns
D Table 52B. OR2TxxB Slave Serial Configuration Mode Timing Characteristics
OR2TxxB Commercial: VDD = 3.0 V to 3.6 V, 0 °C ≤ TA ≤ 70 °C; OR2TxxB Industrial: VDD = 3.0 V to 3.6 V, –40 °C ≤ TA ≤ +85 °C.
V E Parameter
Symbol
Min
Max
Unit
DIN Setup Time
TS
15
—
ns
E U DIN Hold Time
TH
0
—
ns
CCLK High Time
TCH
12.5
—
ns
D CCLK Low Time
TCL
12.5
—
ns
IN CCLK Frequency
FC
—
40
MHz
CCLK to DOUT
TD
—
10
ns
T Note: Serial configuration data is transmitted out on DOUT on the falling edge of CCLK after it is input on DIN
C NT DIN
E O CCLK
L TD
E C DOUT
BIT N
TS
TH
TCL
TCH
BIT N
S DISFigure 70. Slave Serial Configuration Mode Timing Diagram
5-4535(F)
Lattice Semiconductor
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