Table 11-3 contains a list of pins that are driven during the boot program execution. These pins are driven during
the boot sequence for a period of less than 1 second if no correct boot program is found.
Before performing the jump to the application in the internal SRAM, all the PIOs and peripherals used in the boot
program are set to their reset state.
Table 11-3. PIO Driven during Boot Program Execution
NVM Bootloader
Peripheral
Pin
EBI CS3 SMC
NANDOE
EBI CS3 SMC
NANDWE
NAND
EBI CS3 SMC
EBI CS3 SMC
NANDCS
NAND ALE
EBI CS3 SMC
NAND CLE
EBI CS3 SMC
Cmd/Addr/Data
MCI0
MCI0_CK
MCI0
MCI0_CDA
MCI0
MCI0_D0
MCI0
MCI0_D1
MCI0
MCI0_D2
SD Card / eMMC
MCI0
MCI1
MCI0_D3
MCI1_CK
MCI1
MCI1_CDA
MCI1
MCI1_D0
MCI1
MCI1_D1
MCI1
MCI1_D2
MCI1
MCI1_D3
SPI0
MOSI
SPI0
MISO
SPI Flash
SPI0
SPCK
SPI0
NPCS0
SPI0
NPCS1
TWI0 EEPROM
TWI0
TWI0
TWD0
TWCK0
SAM-BA Monitor
DBGU
DBGU
DRXD
DTXD
PIO Line
—
—
—
—
—
—
PIOD9
PIOD0
PIOD1
PIOD2
PIOD3
PIOD4
PIOB24
PIOB19
PIOB20
PIOB21
PIOB22
PIOB23
PIOD11
PIOD10
PIOD12
PIOD13
PIOD14
PIOA30
PIOA31
PIOB30
PIOB31
74 SAMA5D3 Series [DATASHEET]
Atmel-11121F-ATARM-SAMA5D3-Series-Datasheet_02-Feb-16