STM32F407IGT7 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F407IGT7

ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

STM32F405xx, STM32F407xx

Electrical characteristics

Symbol

LU

Parameter

Static latch-up class

Table 45. Electrical sensitivities

Conditions

TA = +105 °C conforming to JESD78A

Class

II level A

5.3.15

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product

operation. However, in order to give an indication of the robustness of the microcontroller in

cases when abnormal injection accidentally happens, susceptibility tests are performed on a

sample basis during device characterization.

Functional susceptibilty to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into

the I/O pin, one at a time, the device is checked for functional failures.

The failure is indicated by an out of range parameter: ADC error above a certain limit (>5

LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out of

5 uA/+0 uA range), or other functional failure (for example reset, oscillator frequency

deviation).

Negative induced leakage current is caused by negative injection and positive induced

leakage current by positive injection.

The test results are given in Table 46.

Table 46. I/O current injection susceptibility

Symbol

Description

Functional susceptibility

Negative

Positive

Unit

injection

injection

IINJ(1)

Injected current on all FT pins

Injected current on any other pin

–5

+0

mA

–5

+5

1. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject

negative currents.

5.3.16

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 47 are derived from tests

performed under the conditions summarized in Table 14. All I/Os are CMOS and TTL

compliant.

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