STM32F407OGH6 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STM32F407OGH6 Datasheet PDF : 185 Pages
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STM32F405xx, STM32F407xx
Pinouts and pin description
Pin number
Table 7. STM32F40x pin and ball definitions (continued)
Pin name
(function after
reset)(1)
Alternate functions Additional functions
- - 97 141 A4 169
PE0
I/O FT
TIM4_ETR / FSMC_NBL0
/ DCMI_D2/ EVENTOUT
- - 98 142 A3 170
PE1
I/O FT
FSMC_NBL1 / DCMI_D3/
EVENTOUT
63 - 99 - D5 -
- A8 - 143 C6 171
VSS
PDR_ON
S
I FT
64
A1
10
0
144
C5
172
VDD
S
- - - - D4 173
PI4
I/O FT
TIM8_BKIN / DCMI_D5/
EVENTOUT
- - - - C4 174
PI5
I/O FT
TIM8_CH1 /
DCMI_VSYNC/
EVENTOUT
- - - - C3 175
PI6
I/O FT
TIM8_CH2 / DCMI_D6/
EVENTOUT
- - - - C2 176
PI7
I/O FT
TIM8_CH3 / DCMI_D7/
EVENTOUT
1. Function availability depends on the chosen device.
2. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F4xx reference manual, available from the STMicroelectronics website:
www.st.com.
4. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
5. If the device is delivered in an UFBGA176 or WLCSP90 and the BYPASS_REG pin is set to VDD (Regulator off/internal reset
ON mode), then PA0 is used as an internal Reset (active low).
Pins(1)
PE2
PE3
Table 8. FSMC pin definition
FSMC
CF
NOR/PSRAM/
SRAM
NOR/PSRAM Mux
NAND 16 bit
LQFP100(2)
WLCSP90
(2)
A23
A23
Yes
A19
A19
Yes
DocID022152 Rev 4
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