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AD8361ART-EVAL(2000) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD8361ART-EVAL
(Rev.:2000)
ADI
Analog Devices 
AD8361ART-EVAL Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD8361SPECIFICATIONS (TA = 25؇C, VS = 3 V, fRF = 900 MHz, ground reference output mode, unless otherwise
noted.)
Parameter
Condition
Min Typ Max Unit
SIGNAL INPUT INTERFACE
Frequency Range1
Linear Response Upper Limit
Input Impedance2
(Input RFIN)
VS = 3 V
Equivalent dBm re 50
VS = 5 V
Equivalent dBm re 50
2.5
390
4.9
660
9.4
225ʈ1
RMS CONVERSION
Conversion Gain
Dynamic Range
± 0.25 dB Error4
± 1 dB Error
± 2 dB Error
Intercept-Induced Dynamic
Range Reduction5, 6
Deviation from CW Response
(Input RFIN to Output V rms)
7.5
fRF = 100 MHz, VS = 5 V
Error Referred to Best Fit Line3
6.5
8.5
CW Input, 40°C < TA < +85°C
14
CW Input, 40°C < TA < +85°C
23
CW Input, 40°C < TA < +85°C
26
CW Input, VS = 5 V, 40°C < TA < +85°C
30
Internal Reference Mode
1
Supply Reference Mode, VS = 3.0 V
1
Supply Reference Mode, VS = 5.0 V
1.5
5.5 dB Peak-to-Average Ratio (IS95 Reverse Link)
0.2
12 dB Peak-to-Average Ratio (W-CDMA 4 Channels)
1.0
18 dB Peak-to-Average Ratio (W-CDMA 15 Channels)
1.2
OUTPUT INTERCEPT5
Ground Reference Mode (GRM)
Internal Reference Mode (IRM)
Supply Reference Mode (SRM)
POWER-DOWN INTERFACE
PWDN HI Threshold
PWDN LO Threshold
Power-Up Response Time
PWDN Bias Current
Inferred from Best Fit Line3
0 V at SREF, VS at IREF
fRF = 100 MHz, VS = 5 V
0 V at SREF, IREF Open
fRF = 100 MHz, VS = 5 V
0 V at IREF, 3 V at SREF
fRF = 100 MHz, VS = 5 V
0 V at IREF, VS at SREF
2.7 VS 5.5 V, 40°C < TA < +85°C
2.7 VS 5.5 V, 40°C < TA < +85°C
2 pF at FLTR Pin, 224 mV rms at RFIN
100 nF at FLTR Pin, 224 mV rms at RFIN
0
50
+150
350
300
500
400
590
750
VS/7.5
VS 0.5
0.1
5
320
<1
POWER SUPPLIES
Operating Range
Quiescent Current
Power-Down Current
40°C < TA < +85°C
0 mV rms at RFIN, PWDN Input LO7
GRM or IRM, 0 mV rms at RFIN, PWDN Input HI
SRM, 0 mV rms at RFIN, PWDN Input HI
2.7
5.5
1.1
<1
10 × VS
NOTES
1Operation at arbitrarily low frequencies is possible; see Applications section.
2Figure 13 and Figure 40 show impedance vs. frequency for the micro_SOIC and SOT respectively.
3Calculated using linear regression.
4Compensated for output reference temperature drift; see Applications section.
5SOT-23-6L operates in ground reference mode only.
6The available output swing, and hence the dynamic range, is altered by both supply voltage and reference mode; see Figures 35 and 36.
7Supply current is input level dependant; see Figure 12.
Specications subject to change without notice.
GHz
mV rms
dBm
mV rms
dBm
ʈpF
V/V rms
V/V rms
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
mV
mV
mV
mV
mV
V
V
V
µs
µs
µA
V
mA
µA
µA
–2–
REV. A

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