300
–40°C
250
200
+25°C +105°C
150
100
50
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VDD (V)
Figure 18. Supply Current vs. Supply Voltage
0.5
0.4
0.3
–40°C
0.2
+25°C
0.1
+105°C
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VDD (V)
Figure 19. Power-Down Current vs. Supply Voltage
400
TA = 25°C
350
VDD = 5V
300
DECREASING
250
INCREASING
200
VDD = 3V
150
100
50
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VLOGIC (V)
Figure 20. Supply Current vs. Logic Input Voltage for SDA and SCL Voltage
Increasing and Decreasing
AD5337/AD5338/AD5339
TA = 25°C
VDD = 5V
VREF = 5V
CH1
VOUTA
CH2
SCL
CH1 1V, CH2 5V, TIME BASE = 1µs/DIV
Figure 21. Half-Scale Settling (1/4 to 3/4 Scale Code Change)
TA = 25°C
VDD = 5V
VREF = 2V
CH1
VDD
CH2 VOUTA
CH1 2V, CH2 200mV, TIME BASE = 200µs/DIV
Figure 22. Power-On Reset to 0 V
TA = 25°C
VDD = 5V
VREF = 2V
CH1
VOUTA
SCL
CH2
CH1 500mV, CH2 5V, TIME BASE = 1µs/DIV
Figure 23. Existing Power-Down to Midscale
Rev. A | Page 13 of 24