AD7980BCPZ-RL(RevC) View Datasheet(PDF) - Analog Devices
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Description
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AD7980BCPZ-RL Datasheet PDF : 28 Pages
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AD7980
CHAIN MODE WITH BUSY INDICATOR
This mode can also be used to daisy-chain multiple AD7980s
on a 3-wire serial interface while providing a busy indicator.
This feature is useful for reducing component count and wiring
connections, for example, in isolated multiconverter applications or
for systems with a limited interfacing capacity. Data readback is
analogous to clocking a shift register.
A connection diagram example using three AD7980s is shown
in Figure 41, and the corresponding timing is given in Figure 42.
Data Sheet
When SDI and CNV are low, SDO is driven low. With SCK
high, a rising edge on CNV initiates a conversion, selects the
chain mode, and enables the busy indicator feature. In this
mode, CNV is held high during the conversion phase and the
subsequent data readback. When all ADCs in the chain have
completed their conversions, the SDO pin of the ADC closest to
the digital host (see the AD7980 ADC labeled C in Figure 41) is
driven high. This transition on SDO can be used as a busy
indicator to trigger the data readback controlled by the digital
host. The AD7980 then enters the acquisition phase and powers
down. The data bits stored in the internal shift register are
clocked out, MSB first, by subsequent SCK falling edges. For
each ADC, SDI feeds the input of the internal shift register and
is clocked by the SCK falling edge. Each ADC in the chain
outputs its data MSB first, and 16 × N + 1 clocks are required to
readback the N ADCs. Although the rising edge can be used to
capture the data, a digital host using the SCK falling edge allows a
faster reading rate and, consequently, more AD7980s in the chain,
provided the digital host has an acceptable hold time.
CNV
SDI AD7980 SDO
A
SCK
CNV
SDI AD7980 SDO
B
SCK
CNV
SDI AD7980 SDO
C
SCK
CONVERT
DIGITAL HOST
DATA IN
IRQ
CLK
Figure 41. Chain Mode with Busy Indicator Connection Diagram
CNV = SDIA
AQUISITION
SCK
tHSDICNV
SDOA = SDIB
SDOB = SDIC
SDOC
tCONV
CONVERSION
tSSDICNV
tEN
tDSDOSDI
tDSDOSDI
tCYC
tACQ
AQUISITION
tSCKH
tSCK
1
2
3
4
15
16
17
18
19
31
32
33
34
35
tSSDISCK
tHSDISC
tSCKL
DA15 DA14 DA13
DA1 DA0
tHSDO
tDSDO
DB15 DB14 DB13
DB1 DB0 DA15 DA14
DA1 DA0
DC15 DC14 DC13
DC1 DC0 DB15 DB14
DB1 DB0 DA15 DA14
Figure 42. Chain Mode with Busy Indicator Serial Interface Timing
47
48
49
tDSDOSDI
tDSDOSDI
tDSDODSI
DA1 DA0
Rev. C | Page 22 of 28
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