Data Sheet
AD8202
SPECIFICATIONS
SINGLE SUPPLY
TOPR = operating temperature range, VS = 5 V, unless otherwise noted, RTI = referred to input, VCM = common-mode voltage.
Table 1.
Parameter
SYSTEM GAIN
Initial
Error vs. Temperature
Gain Drift
VOLTAGE OFFSET
Initial Input Offset (RTI), TOPR
Offset vs. Temperature
INPUT
Input Impedance
Differential
Common Mode
CMV
CMRR2
PREAMPLIFIER
Gain
Gain Error
Output Voltage Range
Output Resistance
OUTPUT BUFFER
Gain
Gain Error
Output Voltage Range4
Input Bias Current
Output Resistance
DYNAMIC RESPONSE
System Bandwidth
Slew Rate
NOISE
0.1 Hz to 10 Hz
Spectral Density, 1 kHz (RTI)
POWER SUPPLY
Operating Range
Quiescent Current vs.
Temperature
PSRR
TEMPERATURE RANGE
For Specified Performance
Conditions
0.04 ≤ VOUT ≤ 4.8 V dc, TOPR
TOPR
VCM = 0 V, TOPR
Continuous
VCM = −6 V to +28 V
f = dc to 1 kHz
f = 10 kHz3
0.04 ≤ VOUT ≤ 4.8 V dc, TOPR
VIN = 0.1 V p-p; VOUT = 2.0 V p-p
VIN = 0.2 V dc; VOUT = 4 V step
VO = 0.1 V dc
VS = 3.5 V to 12 V
TOPR
AD8202 SOIC
Min Typ Max
20
±0.3
±20
±2
±10
260 325 390
135 170 205
−6
+28
82
80
10
±0.3
0.02
4.8
97 100 103
2
±0.3
0.04
4.8
40
2
30 50
0.28
10
275
3.5
12
0.25 1.0
75 83
−40
+125
AD8202 MSOP
Min Typ Max
AD8202 Die1
Min Typ Max
20
±0.3
±20
20
±0.3
±30
±2
±3
±15
±15
260 325 390
135 170 205
−6
+28
260 325 390
135 170 205
−6
+28
82
82
80
80
10
±0.3
0.02
4.8
97 100 103
10
±0.3
0.02
4.8
97 100 103
2
2
±0.3
±0.3
0.04
4.8 0.04
4.8
40
40
2
2
30 50
0.28
30 50
0.28
10
10
275
275
3.5
12
0.25 1.0
75 83
3.5
12
0.25 1.0
75 83
−40
+125 −40
+150
Unit
V/V
%
ppm/°C
mV
μV/°C
kΩ
kΩ
V
dB
dB
V/V
%
V
kΩ
V/V
%
V
nA
Ω
kHz
V/μs
μV p-p
nV/√Hz
V
mA
dB
°C
1 Die is specified for operation from −40°C to +150°C ( TOPR for DIE).
2 Source imbalance <2 Ω.
3 The AD8202 preamplifier exceeds 80 dB CMRR at 10 kHz. However, because the signal is available only by way of a 100 kΩ resistor, even the small amount of pin-to-
pin capacitance between Pin 1, Pin 8 and Pin 3, Pin 4 might couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of
pin-to-pin coupling can be neglected in all applications by using filter capacitors at Node 3.
4 The output voltage range of A2 assumes that Pin 3 (A1 output) and Pin 4 (A2 Input) are shorted together. A 25 kΩ load resistor was used for testing.
Rev. H | Page 3 of 20