AD8203MSOP(RevD) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD8203MSOP Datasheet PDF : 20 Pages
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AD8203
FREQUENCY
20dB/DECADE
40dB/DECADE
40log (f2/f1)
A 1-POLE FILTER, CORNER f1, AND
A 2-POLE FILTER, CORNER f2, HAVE
THE SAME ATTENUATION –40log (f2/f1)
AT FREQUENCY f22/f1
f1
f2
f22/f1
Figure 48. Comparative Responses of 1-Pole and 2-Pole Low-Pass Filters
HIGH LINE CURRENT SENSING WITH LPF AND
GAIN ADJUSTMENT
Figure 49 is another refinement of Figure 2, including gain
adjustment and low-pass filtering.
BATTERY
CLAMP
DIODE
14V
4-TERM
SHUNT
INDUCTIVE
LOAD 5V
+IN +VS NC OUT
AD8203
OUT
4V/AMP
133kΩ
20kΩ
POWER
DEVICE
–IN GND A1 A2
VOS/IB
NULL
C
NC = NO CONNECT
COMMON
5% CALIBRATION RANGE
fC(Hz) = 0.767Hz/C(µF)
(0.22µF FOR fC = 3.6Hz)
Figure 49. High Line Current Sensor Interface;
Gain = ×40, Single-Pole Low-Pass Filter
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends on
the inductance of the load and the control frequency. The
common-mode voltage, conversely, extends from roughly 1 V
above ground for the on condition to about 1.5 V above the
battery voltage for the off condition. The conduction of the
clamping diode regulates the common-mode potential applied
to the device. For example, a battery spike of 20 V may result in
an applied common-mode potential of 21.5 V to the input of
the devices.
To produce a full-scale output of 4 V, a gain ×40 is used, adjust-
able by ±5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
Data Sheet
by a 1-pole low-pass filter, shown in Figure 49, set with a corner
frequency of 3.6 Hz, which provides about 30 dB of attenuation
at 100 Hz. A higher rate of attenuation can be obtained using a
2-pole filter with fC = 20 Hz, as shown in Figure 50. Although
this circuit uses two separate capacitors, the total capacitance is
less than half that needed for the 1-pole filter.
BATTERY
CLAMP
DIODE
14V
4-TERM
SHUNT
POWER
DEVICE
INDUCTIVE
LOAD 5V
+IN +VS NC OUT
AD8203
–IN GND A1 A2
OUTPUT
301kΩ
C
50kΩ
93kΩ
C
NC = NO CONNECT
COMMON
fC(Hz) = 1/C(µF)
(0.05µF FOR fC = 20Hz)
Figure 50. 2-Pole Low-Pass Filter
DRIVING CHARGE REDISTRIBUTION ADCS
When driving CMOS ADCs, such as those embedded in popu-
lar microcontrollers, the charge injection (ΔQ) can cause a
significant deflection in the output voltage of the AD8203.
Though generally of short duration, this deflection may persist
until after the sample period of the ADC has expired due to the
relatively high open-loop output impedance (21 kΩ) of the
AD8203. Including an R-C network in the output can signifi-
cantly reduce the effect. The capacitor helps to absorb the
transient charge, effectively lowering the high frequency output
impedance of the AD8203. For these applications, the output
signal should be taken from the midpoint of the
RLAG to CLAG combination, as shown in Figure 51.
Since the perturbations from the analog-to-digital converter are
small, the output impedance of the AD8203 appears to be low. The
transient response, therefore, has a time constant governed by the
product of the two LAG components, CLAG × RLAG. For the values
shown in Figure 51, this time constant is programmed at approxi-
mately 10 µs. Therefore, if samples are taken at several tens of
microseconds or more, there is negligible charge stack-up.
5V
4
7
+IN
–IN
AD8203
A2
5
10kΩ
RLAG
1kΩ
CLAG
0.01µF
MICROPROCESSOR
A/D
10kΩ
2
Figure 51. Recommended Circuit for Driving CMOS A/D
Rev. D | Page 16 of 20
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