AD8375
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VCOM 1
VIN+ 2
VIN– 3
A4 4
A3 5
A2 6
PIN 1
INDICATOR
AD8375
TOP VIEW
(Not to Scale)
18 VOUT–
17 VOUT+
16 VOUT–
15 VOUT+
14 COMM
13 VPOS
Figure 3. 24-Lead LFCSP
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
1
VCOM
2
VIN+
3
VIN−
4
A4
5
A3
6
A2
7
A1
8
A0
9, 10, 12, 13, 23
VPOS
11, 14, 20, 21, 22, 24
COMM
15, 17
VOUT+
16, 18
VOUT−
19
PWUP
Description
Common-Mode Pin. Typically bypassed to ground using external capacitor.
Voltage Input Positive.
Voltage Input Negative.
MSB for the 5-Bit Gain Control Interface.
MSB − 1 for the Gain Control Interface.
MSB − 2 for the Gain Control Interface.
LSB + 1 for the Gain Control Interface.
LSB for the 5-Bit Gain Control Interface.
Positive Supply Pins. Should be bypassed to ground using suitable bypass capacitor.
Device Common (DC Ground).
Positive Output Pins (Open Collector). Require dc bias of +5 V nominal.
Negative Output Pins (Open Collector). Require dc bias of +5 V nominal.
Chip Enable Pin. Enabled with a logic high and disabled with a logic low.
Rev. 0 | Page 6 of 24