Register Description by Block
ADE3800
Register Name
TCON_SHADOW_BUF_4
TCON_SHADOW_BUF_5
TCON_SHADOW_BUF_6
TCON_SHADOW_BUF_7
Table 39: Register Map (Sheet 3 of 7)
Addr. Bits Mode Rst
Description
0B09 [7:0]
0B0A [3:0]
0B0B [7:0]
0B0C [4:0]
R/W
00
shadow buffer 4
R/W
00
shadow buffer 5
R/W
00
shadow buffer 6
R/W
00
shadow buffer 7
TCON_COMP_0_L
TCON_COMP_0_U
TCON_COMP_1_L
TCON_COMP_1_U
TCON_COMP_2_L
TCON_COMP_2_U
TCON_COMP_3_L
TCON_COMP_3_U
0B10 [7:0]
0B11 [4]
R/W
00
R/W
00
0B12
0B13
0B14
0B15
0B16
0B17
[3:0]
R/W
refer to TCON_COMP_0
refer to TCON_COMP_0
refer to TCON_COMP_0
count comparison value
0*: horizontal count compare
1: vertical count compare
count comparison value
TCON_PULSE_0_SET_L
TCON_PULSE_0_SET_U
TCON_PULSE_0_RST_L
TCON_PULSE_0_RST_U
TCON_PULSE_1_SET_L
TCON_PULSE_1_SET_U
TCON_PULSE_1_RST_L
TCON_PULSE_1_RST_U
TCON_PULSE_2_SET_L
TCON_PULSE_2_SET_U
TCON_PULSE_2_RST_L
TCON_PULSE_2_RST_U
TCON_PULSE_3_SET_L
TCON_PULSE_3_SET_U
TCON_PULSE_3_RST_L
TCON_PULSE_3_RST_U
0B18 [7:0]
0B19 [3:0]
0B1A [7:0]
0B1B [7:6]
[5:4]
R/W
00
R/W
00
R/W
00
R/W
00
R/W
0B1C
0B1D
0B1E
0B1F
0B20
0B21
0B22
0B23
0B24
0B25
0B26
0B27
[3:0]
R/W
refer to TCON_PULSE_0
refer to TCON_PULSE_0
refer to TCON_PULSE_0
set point compare value
set point compare value
reset point compare value
for vertical pulses, 1 of 4 comparators is
selected to define the horizontal change point
0*: horizontal pulse
1: vertical pulse
2,3: single point, set=h, rst=v
reset point compare value
108/138