ADM1075
Bits Bit Name
4
VIN_UV_FAULT
[3:1] RESERVED
0
PIN_OP_WARN
Data Sheet
Settings
0
1
0
1
Description
Latched register.
No undervoltage detected on the UVx pin.
An undervoltage was detected on the UVx pin.
Always reads as 000.
Latched register.
No overpower condition on the input supply detected by the power
monitor.
An overpower condition on the input supply was detected by the
power monitor.
Reset
0x0
0x0
0x0
Access
R
R
R
MANUFACTURING SPECIFIC STATUS REGISTER
Address: 0x80, Reset: 0x00, Name: STATUS_MFR_SPECIFIC
Table 19. Bit Descriptions for STATUS_MFR_SPECIFIC
Bits Bit Name
Settings Description
7
FET_HEALTH_BAD
Latched register.
0 FET behavior appears to be as expected.
1 FET behavior suggests that the FET may be shorted.
6
UV_CMP_OUT
Live register.
0 Input voltage to UVx pin is above threshold.
1 Input voltage to UVx pin is below threshold.
5
OV_CMP_OUT
Live register.
0 Input voltage to OV pin is below threshold.
1 Input voltage to OV pin is above threshold.
4
VAUX_STATUS
Latched register.
0 There are no active status bits to be read by STATUS_VAUX.
1 There are one or more active status bits to be read by STATUS_VAUX.
3
HS_INLIM_FAULT
Latched register.
0 The ADM1075 has not actively limited the current into the load.
1 The ADM1075 has actively limited current into the load. This bit
differs from the IOUT_OC_FAULT bit in that the HS_INLIM bit is set
immediately, whereas the IOUT_OC_FAULT bit is not set unless the
time limit set by the capacitor on the TIMER pin elapses.
[2:1] HS_SHUTDOWN_CAUSE
Latched register.
00 The ADM1075 is either enabled and working correctly, or has been
shut down using the OPERATION command.
01 An IOUT_OC_FAULT condition occurred that caused the ADM1075
to shut down.
10 A VIN_UV_FAULT condition occurred that caused the ADM1075 to
shut down.
11 A VIN_OV_FAULT condition occurred that caused the ADM1075 to
shut down.
0
IOUT_WARN2
Latched register.
0 No overcurrent condition on the output supply detected by the
power monitor using the IOUT_WARN2_LIMIT command.
1 An undercurrent or overcurrent condition on the output supply was
detected by the power monitor using the IOUT_WARN2_LIMIT
command. The polarity of the threshold condition is set by the
IOUT_WARN2_OC_SELECT bit using the DEVICE_CONFIG command.
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Access
R
R
R
R
R
R
R
Rev. A | Page 42 of 52