ADP-I2C-USB-Z View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP-I2C-USB-Z

Digital Controller for Isolated Power Supply with PMBus Interface

Analog Devices 

Data Sheet

ADP1051

First Flag ID Recording

When the ADP1051 registers one or several fault conditions,

it stores the first flag in a dedicated first flag ID register (Regi-

ster 0xFEA6). The first flag ID represents the first flag that

triggers a shutdown response. The following types of flags are

not recorded in the first flag ID register:

Flags that are configured to be ignored

Flags that have a configured response causing the PWM outputs

to be disabled, but that do not use a soft start to reenable the

PWM outputs after the fault is resolved

Flags that have a configured response causing the synchronous

rectifiers to be disabled

The first flag ID register gives the user more information for

fault diagnosis than a simple flag. This register also stores the

previous first fault ID.

The status of the first flag ID register can be saved to the EEPROM,

as well, by setting Register 0xFE0C[3]. To limit the number of

writes to the EEPROM, only the first flag after a VDD power reset

can be saved to the EEPROM. During the next VDD power-on,

the first flag ID is downloaded from the EEPROM and loaded

to the first flag ID register (Register 0xFEA6).

Table 7. First Flag ID Timing1

Step

t0

t1

t2

t3

t4

t5

t6

t7

t8

t9

Action

As an example, the previous ID and the current ID in the EEPROM

are 0 and Flag X, respectively. When the VDD voltage is applied on

the ADP1051, the first flag ID is downloaded from the EEPROM

to the first flag ID register (Register 0xFEA6).

A fault (Flag Y) shuts down the power supply. In the first flag ID

register, Flag Y is now the current flag ID, and Flag X is the previous

flag ID. The first flag ID register is updated accordingly. The EEPROM

is then updated to save this information.

Another fault (Flag Z) occurs while the power supply is off.

Because Flag Z is not the first flag that caused the shutdown,

neither the first flag ID register nor the EEPROM is updated.

Flag Y is cleared, but Flag Z keeps the power supply off. The first

flag ID register and the EEPROM are not updated.

Flag Z is cleared. The first flag ID register is not updated.

The power supply is turned on again after the flag reenable

delay. The first flag ID register is not updated.

The fault indicated by Flag Z shuts down the power supply. Flag Z

is now the current first flag ID, and Flag Y is the previous flag ID.

The first flag ID register is updated accordingly. The EEPROM is

not updated to save the information.

Flag Z is cleared. The first flag ID register is not updated.

The power supply is turned on again after the flag reenable

delay. The first flag ID register is not updated.

The VDD voltage is removed and the power supply is turned off.

Figure 34 shows the timing diagram for the first flag ID recording

scheme. Table 7 describes the actions shown in Figure 34.

VDD

FLAG Y

FLAG Z

POWER SUPPLY

STATUS

FIRST FLAG ID

X

Y

Z

(CURRENT)

FIRST FLAG ID

0

X

Y

(PREVIOUS)

EEPROM

UPDATE

t2 t4

t0

t1 t3 t5

t6 t8

t9

t7

Figure 34. First Flag Timing

Power

Supply

On

First Flag ID in Register

Previous ID Current ID

0

Flag X

First Flag ID in EEPROM

Previous ID Current ID

0

Flag X

Off

Flag X

Flag Y

Flag X

Flag Y

Off

Flag X

Off

Flag X

Off

Flag X

On

Flag X

Off

Flag Y

Flag Y

Flag Y

Flag Y

Flag Y

Flag Z

Flag X

Flag X

Flag X

Flag X

Flag X

Flag Y

Flag Y

Flag Y

Flag Y

Flag Y

Off

Flag Y

On

Flag Y

Off

N/A

Flag Z

Flag Z

N/A

Flag X

Flag X

N/A

Flag Y

Flag Y

N/A

1 N/A means not applicable.

Rev. B | Page 31 of 108

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