ADP151CPZ-REDYKIT(RevD) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADP151CPZ-REDYKIT Datasheet PDF : 24 Pages
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OUTLINE DIMENSIONS
2.90 BSC
1.60 BSC
5
4
2.80 BSC
1
2
3
*0.90 MAX
0.70 MIN
1.90
BSC
0.95 BSC
*1.00 MAX 0.20
0.08
0.10 MAX
0.50
0.30
8°
SEATING
4°
0.60
PLANE
0°
0.45
0.30
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 63. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions show in millimeters
0.800
0.760 SQ
0.720
0.430
0.400
0.370
0.660
0.600
0.540
SEATING
PLANE
2
1
BALL A1
IDENTIFIER
TOP VIEW
(BALL SIDE DOWN)
0.230
0.200
0.170
0.40
BALL PITCH
0.280
0.260
0.240
0.050 NOM
COPLANARITY
A
B
BOTTOM VIEW
(BALL SIDE UP)
PIN 1 INDEX
AREA
0.60
0.55
0.50
SEATING
PLANE
Figure 64. 4-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-4-3)
Dimensions show in millimeters
2.00
BSC SQ
1.70
1.60
1.50
0.65 BSC
4
6
TOP VIEW
0.425
0.350
0.275
EXPOSED
PAD
1.10
1.00
0.90
3
1
BOTTOM VIEW
PIN 1
INDICATOR
(R 0.15)
0.05 MAX
0.02 NOM
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.35
0.30
0.20 REF
0.25
Figure 65. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
2.00 mm × 2.00 mm Body, Ultra Thin, Dual Lead
(CP-6-3)
Dimensions show in millimeters
Rev. D | Page 21 of 24
ADP151
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