ADP162UJZ-REDYKIT View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP162UJZ-REDYKIT

Ultralow Quiescent Current,150 mA, CMOS Linear Regulators

Analog Devices 

ADP160/ADP161/ADP162/ADP163

THEORY OF OPERATION

The ADP16x are ultralow quiescent current, low dropout linear

regulators that operate from 2.2 V to 5.5 V and can provide up to

150 mA of output current. Drawing only 560 nA (typical) at no

load and a low 42 µA of quiescent current (typical) at full load

makes the ADP16x ideal for battery-operated portable equip-

ment. Shutdown current consumption is typically 50 nA.

Using new innovative design techniques, the ADP16x provide

ultralow quiescent current and superior transient performance

for digital and RF applications. The ADP16x are also optimized

for use with small 1 µF ceramic capacitors.

VIN

VOUT

GND

SHORT CIRCUIT,

UVLO, AND

THERMAL

PROTECT

R1

R3

EN

SHUTDOWN

REFERENCE

R2

ADP160

Figure 30. Internal Block Diagram, Fixed Output with Output Discharge Function

VIN

VOUT

GND

EN

SHORT CIRCUIT,

UVLO, AND

THERMAL

PROTECT

SHUTDOWN

REFERENCE

R1

ADJ

ADP161

Figure 31. Internal Block Diagram, Adjustable Output with Output Discharge

Function

VIN

VOUT

GND

SHORT CIRCUIT,

UVLO, AND

R1

THERMAL

PROTECT

EN

SHUTDOWN

REFERENCE

R2

ADP162

Figure 32. Internal Block Diagram, Fixed Output without Output Discharge

Function

Data Sheet

VIN

VOUT

GND

SHORT CIRCUIT,

UVLO, AND

THERMAL

PROTECT

ADJ

EN

SHUTDOWN

REFERENCE

ADP163

Figure 33. Internal Block Diagram, Adjustable Output without Output

Discharge Function

Internally, the ADP16x consists of a reference, an error amplifier, a

feedback voltage divider, and a PMOS pass transistor. Output

current is delivered via the PMOS pass device, which is controlled

by the error amplifier. The error amplifier compares the reference

voltage with the feedback voltage from the output and amplifies

the difference. If the feedback voltage is lower than the reference

voltage, the gate of the PMOS device is pulled lower, allowing

more current to pass and increasing the output voltage. If the

feedback voltage is higher than the reference voltage, the gate

of the PMOS device is pulled higher, allowing less current to pass

and decreasing the output voltage.

The adjustable ADP161/ADP163 have an output voltage range

of 1.0 V to 4.2 V. The output voltage is set by the ratio of two

external resistors, as shown in Figure 2. The device servos the

output to maintain the voltage at the ADJ pin at 1.0 V refe-

renced to ground. The current in R1 is then equal to 1.0 V/R2,

and the current in R1 is the current in R2 plus the ADJ pin bias

current. The ADJ pin bias current, 10 nA at 25°C, flows through

R1 into the ADJ pin.

The output voltage can be calculated using the equation:

VOUT = 1.0 V(1 + R1/R2) + (ADJI-BIAS)(R1)

The value of R1 should be less than 200 kΩ to minimize errors in

the output voltage caused by the ADJ pin bias current. For example,

when R1 and R2 each equal 200 kΩ, the output voltage is 2.0 V.

The output voltage error introduced by the ADJ pin bias current

is 2 mV or 0.05%, assuming a typical ADJ pin bias current of

10 nA at 25°C.

Rev. H | Page 12 of 24

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