ADP3331
SILICON
DIE
SILICON DIE
WITH
ELECTRICALLY
ISOLATED
DIE ATTACH
NORMAL SOT-23-6 PACKAGE
THERMALLY ENHANCED
CHIP-ON-LEAD PACKAGE
Figure 4. Chip-on-Lead Package
Calculating Junction Temperature
Device power dissipation is calculated as follows:
( ) ( ) PD = VIN - VOUT ILOAD + VIN IGND
(8)
Where ILOAD and IGND are load current and ground current and
VIN and VOUT are the input and output voltages, respectively.
Assuming that the worst case operating conditions are ILOAD =
200 mA, IGND = 4 mA, VIN = 4.2 V, and VOUT = 3.0 V, the
device power dissipation is
PD = (4.2 V - 3.0 V ) 200 mA + (4.2 V ) 4 mA = 257 mW (9)
The proprietary package used on the ADP3331 has a thermal
resistance of 165∞C/W when placed on a 4-layer board and
190∞C/W when placed on a 2-layer board. This allows the ambient
temperature to be significantly higher for a given power dissipa-
tion than with a standard package. Assuming a 4-layer board, the
junction temperature rise above ambient will be approximately
equal to
D TJA = 0.257 W ¥ 165oC/W = 42.4oC
(10)
To limit the junction temperature to 125∞C, the maximum
allowable ambient temperature is
TA( MAX ) = + 125oC - 42.4oC = 82.6oC
(11)
Shutdown Mode
Applying a TTL level high signal to the shutdown (SD) pin, or
tying it to the input pin, will turn the output ON. Pulling the
SD to 0.4 V or below, or tying it to ground, will turn the output
OFF. In shutdown mode, the quiescent current is reduced to
less than 1 mA.
Error Flag Dropout Detector
The ADP3331 will maintain its output voltage over a wide
range of load, input voltage, and temperature conditions. If the
output is about to lose regulation due to the input voltage
approaching the dropout level, the error flag will be activated.
The ERR output is an open collector, which will be driven low.
Once set, the ERR flag’s hysteresis will keep the output low until
a small margin of operating range is restored either by raising
the supply voltage or reducing the load.
Low Voltage Applications
In applications where the output voltage is 2.2 V or less, the
ADP3331 may begin to exhibit some turn-on overshoot. The
degree of overshoot is determined by several factors: the output
voltage setting, the output load, the noise reduction capacitor,
and the output capacitor.
The output voltage setting is determined by the application and
cannot be tailored for minimum overshoot. In general, for output
voltages of 2.2 V or less, the overshoot becomes larger as the
output voltage decreases.
The output load is also determined by the system requirements.
However, if the ADP3331 has no load on the output during
startup, a small amount of preload can be added to minimize
overshoot. A preload of 2 mA to 20 mA is recommended.
A noise reduction capacitor, if not already being used, is sug-
gested to reduce the overshoot. Values in the range of 10 pF to
100 pF work best, along with the preload suggested previously.
The output capacitor can be adjusted to minimize the over-
shoot. Values in the 0.47 mF to 1.0 mF range should be used in
conjunction with the preload and noise reduction capacitor.
Further increases in the output capacitance may be acceptable if
the output already has a sizable load during startup.
Higher Output Current
The ADP3331 can source up to 200 mA without any heat sink
or pass transistor. If higher current is needed, an appropriate pass
transistor can be used, as in Figure 5, to increase the output
current to 1 A.
VIN = 3.3V
C1
47â®F
MJE253*
R1
50â€
VOUT = 1.8V @ 1A
IN OUT
ADP3331
SD
FB
GND ERR
*REQUIRES HEAT SINK
C2
10â®F 340kâ€
698kâ€
Figure 5. High Output Current Linear Regulator
Printed Circuit Board Layout Considerations
Use the following general guidelines when designing printed
circuit boards:
1. PC board traces with larger cross sectional areas will remove
more heat from the ADP3331. For optimum heat transfer,
specify thick copper and use wide traces.
2. The thermal resistance can be decreased by approximately
10% by adding a few square centimeters of copper area to
the lands connected to the pins of the LDO.
3. The feedback pin is a high impedance input, and care should
be taken when making a connection to this pin. The voltage
setting resistors and noise reduction network must be located
as close as possible. Long PC board traces are not recom-
mended. Avoid routing traces near possible noise sources.
–8–
REV. A