ADSP-21366BBCZ-1AA(RevA) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-21366BBCZ-1AA
(Rev.:RevA)

SHARC® Processor

Analog Devices 

ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366

JTAG Test Access Port and Emulation

Table 40. JTAG Test Access Port and Emulation

Parameter

Min

Timing Requirements

tTCK

TCK Period

tCK

tSTAP

TDI, TMS Setup Before TCK High

5

tHTAP

TDI, TMS Hold After TCK High

6

tSSYS1

System Inputs Setup Before TCK High

7

tHSYS1

System Inputs Hold After TCK High

18

tTRSTW

TRST Pulse Width

4tCK

Switching Characteristics

tDTDO

tDSYS2

TDO Delay from TCK Low

System Outputs Delay After TCK Low

1 System Inputs = AD15–0, SPIDS, CLKCFG1–0, RESET, BOOTCFG1–0, MISO, MOSI, SPICLK, DAI_Px, FLAG3–0.

2 System Outputs = MISO, MOSI, SPICLK, DAI_Px, AD15–0, RD, WR, FLAG3–0, CLKOUT, EMU, ALE.

Max

Unit

ns

ns

ns

ns

ns

ns

7

ns

tCK ÷ 2 + 7

ns

TCK

TMS

TDI

TDO

SYSTEM

INPUTS

SYSTEM

OUTPUTS

tTCK

tSTAP

tDTDO

tSSYS

tDSYS

tHTAP

tHSYS

Figure 36. IEEE 1149.1 JTAG Test Access Port

Rev. A | Page 45 of 52 | December 2006

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