ADSP-BF514BBCZ-3 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADSP-BF514BBCZ-3 Datasheet PDF : 68 Pages
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ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
SDRAM Interface Timing
Table 28. SDRAM Interface Timing
VDDMEM
1.8V Nominal
VDDMEM
2.5 V/3.3V Nominal
Parameter
Min
Max
Min
Max Unit
Timing Requirements
tSSDAT
Data Setup Before CLKOUT
tHSDAT
Data Hold After CLKOUT
Switching Characteristics
1.5
1.5
ns
1.3
0.8
ns
tSCLK
tSCLKH
tSCLKL
tDCAD
tHCAD
tDSDAT
tENSDAT
CLKOUT Period1
CLKOUT Width High
CLKOUT Width Low
Command, Address, Data Delay After CLKOUT2
Command, Address, Data Hold After CLKOUT2
Data Disable After CLKOUT
Data Enable After CLKOUT
12.5
10
5
4
5
4
5
1
1
5.5
0
0
ns
ns
ns
4
ns
ns
5
ns
ns
1 The tSCLK value is the inverse of the fSCLK specification discussed in Table 11 on Page 21. Package type and reduced supply voltages affect the best-case value listed here.
2 Command pins/balls include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
CLKOUT
DATA (IN)
DATA (OUT)
COMMAND,
ADDRESS
(OUT)
tSSDAT
tSCLK
tHSDAT
tENSDAT
tSCLKL
tSCLKH
tDCAD
tHCAD
tDSDAT
tDCAD
tHCAD
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
Figure 12. SDRAM Interface Timing
Rev. B | Page 31 of 68 | January 2011
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