ADV7180BCP32Z-RL View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADV7180BCP32Z-RL

10-Bit, 4× Oversampling SDTV Video Decoder

Analog Devices 

ADV7180

Data Sheet

Pin No.

38

39

40

51

52

53

54

63

64

Mnemonic

VREFP

VREFN

AVDD

RESET

ALSB

SDATA

SCLK

FIELD

VS

Type

O

O

P

I

I

I/O

I

O

O

Description

Internal Voltage Reference Output. See Figure 56 for recommended output circuitry.

Internal Voltage Reference Output. See Figure 56 for recommended output circuitry.

Analog Supply Voltage (1.8 V).

System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to reset

the ADV7180 circuitry.

This pin selects the I2C address for the ADV7180. For ALSB set to Logic 0, the address selected

for a write is 0x40; for ALSB set to Logic 1, the address selected is 0x42.

I2C Port Serial Data Input/Output Pin.

I2C Port Serial Clock Input. The maximum clock rate is 400 kHz.

Field Synchronization Output Signal.

Vertical Synchronization Output Signal.

Rev. G | Page 16 of 120

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