ADV7623
Data Sheet
Pin No.
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Mnemonic
RXC_2−
RXC_2+
HP_CTRLD
5V_DETD
DGND
DVDD
DDCD_SDA
DDCD_SCL
CVDD
CGND
RXD_C−
RXD_C+
TVDD
RXD_0−
RXD_0+
CGND
RXD_1−
RXD_1+
TVDD
RXD_2−
RXD_2+
CVDD
CGND
TXPVDD
Type
HDMI input
HDMI input
Digital output
Digital input
Ground
Power
Digital I/O
Digital input
Power
Ground
HDMI input
HDMI input
Power
HDMI input
HDMI input
Ground
HDMI input
HDMI input
Power
HDMI input
HDMI input
Power
Ground
Power
37
TXPLVDD Power
38
TXGND
Ground
39
TXPGND
Ground
40
EXT_SWING Analog input
41
HPD_ARC− Analog input
42
ARC+
Analog input
43
TXDDC_SDA Digital I/O
44
TXDDC_SCL Digital output
45
TXAVDD
Power
46
TXGND
Ground
47
TXC−
HDMI output
48
TXC+
HDMI output
49
TXGND
Ground
50
TX0−
HDMI output
51
TX0+
HDMI output
52
TXGND
Ground
53
TX1−
HDMI output
54
TX1+
HDMI output
55
TXAVDD
Power
Description
Digital Input Channel 2 Complement of Port C in the HDMI Interface.
Digital Input Channel 2 True of Port C in the HDMI Interface.
Hot Plug Detect for Port D.
5 V Detect Pin for Port D in the HDMI Interface.
DVDD Ground.
Digital Supply Voltage (1.8 V).
HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
Digital Input Clock Complement of Port D in the HDMI Interface.
Digital Input Clock True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 0 Complement of Port D in the HDMI Interface.
Digital Input Channel 0 True of Port D in the HDMI Interface.
TVDD and CVDD Ground.
Digital Input Channel 1 Complement of Port D in the HDMI Interface.
Digital Input Channel 1 True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 2 Complement of Port D in the HDMI Interface.
Digital Input Channel 2 True of Port D in the HDMI Interface.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the
digital logic and I/Os. It should be filtered and as quiet as possible.
1.8 V Power Supply.
TXPVDD Ground.
TXPLVDD Ground.
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
this pin and ground.
Hot Plug Detect Signal and Audio Return Channel Inverted Input. This pin indicates to the
interface whether the receiver is connected.
Audio Return Channel (ARC) Input (5 V Tolerant).
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
5 V CMOS logic level.
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
It supports a 5 V CMOS logic level.
1.8 V Power Supply for TMDS Outputs.
TXAVDD Ground.
Differential Clock Output. Differential clock output at the TMDS clock rate; supports
TMDS logic level.
Differential Clock Output. Differential clock output at the TMDS clock rate; supports
TMDS logic level.
TXAVDD Ground.
Differential Output Channel 0 Complement. Differential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Differential Output Channel 0 True. Differential output of the red data at 10× the pixel clock
rate; supports TMDS logic level.
TXAVDD Ground.
Differential Output Channel 1 Complement. Differential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Differential Output Channel 1 True. Differential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
1.8 V Power Supply for TMDS Outputs.
Rev. D | Page 10 of 16