AOZ1034DI View Datasheet(PDF) - Alpha and Omega Semiconductor
Part Name
Description
Manufacturer
AOZ1034DI Datasheet PDF : 18 Pages
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AOZ1034
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When
designing the compensation loop, converter stability
under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency. The
AOZ1034 operates at a frequency range from 400kHz to
600kHz. It is recommended to choose a crossover
frequency equal or less than 40kHz.
fC = 40kHz
The strategy for choosing RC and CC is to set the
cross over frequency with Rc and set the compensator
zero with CC. Using selected crossover frequency, fC,
to calculate RC:
RC
=
fC
×
--V----O----
VFB
×
-----2----π----×-----C-----C------
GEA × GCS
where;
fC is desired crossover frequency. For best performance,
fC is set to be about 1/10 of switching frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is
200 x 10-6 A/V, and
GCS is the current sense circuit transconductance, which is
6.68 A/V.
The compensation capacitor Cc and resistor Rc together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. CC can is selected by:
CC
=
--------------1----.-5----------------
2π × RC × fP1
The equation above can also be simplified to:
CC
=
C-----O-----×-----R-----L-
RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1034 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the
LX pins, to the filter inductor, to the output capacitor
and load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of the Schottky
diode, to the cathode of the Schottky diode. Current flows
in the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1034.
In the AOZ1034 buck regulator circuit, the major power
dissipating components are the AOZ1034 and the output
inductor. The total power dissipation of converter circuit
can be measured by input power minus output power.
Ptotal_loss = VIN × IIN – VO × IO
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
Pinductor_loss = IO2 × Rinductor × 1.1
The actual junction temperature can be calculated with
power dissipation in the AOZ1034 and thermal
impedance from junction to ambient.
Tjunction = (Ptotal_loss–Pinductor_loss) × ΘJA
The maximum junction temperature of AOZ1034 is
150ºC, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1034 under different ambient
temperature.
The thermal performance of the AOZ1034 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
Rev. 1.1 September 2010
www.aosmd.com
Page 11 of 18
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